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1. Most TTL gates use the totem-pole output arrangement.



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MCQ->Most TTL gates use the totem-pole output arrangement.....
MCQ->Why does the TTL family use a totem-pole circuit on the output?....
MCQ->Assertion (A): In totem pole output the output impedance is low.Reason (R): TTL gate with active pull up should not be used in wired AND connection.

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MCQ->Assertion (A): Even if TTL gates and CMOS gates used in a realization have the same power supply of + 5 V, suitable circuit is needed to interconnect themReason (R): VOH, VOL, VIH and VIL of a TTL gave are respectively 2.4, 0.4, 2 and 0.8 V respectively. If supply voltage is + 5 V. VIL and VIH for CMOS gate for the supply voltage of + 5 V are 1.5 V and 3.5 V respectively.

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MCQ->Whenever a totem-pole TTL output goes from LOW to HIGH, a high-amplitude current spike is drawn from the Vcc supply. How is this effect corrected to a digital circuit?....
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